K5D5657ACM Datasheet, PDF (58/74 Pages) Samsung semiconductor – 256Mb NAND and 256Mb Mobile SDRAM

K5D5657ACM-F015
PrelAimdvinanacrye
MCP MEMORY
Single Bit Read-Write-Read Cycle(Same Page) @CAS Latency=3, Burst Length=1
tCH
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CLOCK
tCC
tCL
CKE
tRAS
HIGH
tRP
tRC
*Note 1
tSH
CS
tRCD
tSH
tSS
RAS
CAS
ADDR
BA0,BA1
tSS
tSH
Ra
tSS
*Note 2
BS
tSH
tSS
Ca
*Note 2,3
BS
Cb
Cc
*Note 2,3
BS
*Note 2,3 *Note 4
BS BS
Rb
*Note 2
BS
A10/AP
Ra
DQ
WE
DQM
*Note 3
*Note 3
*Note 3 *Note 4
tSAC
Qa
tSLZ tOH
tSH
Db
tSS
tSS tSH
Rb
Qc
tSS tSH
Row Active
Read
Write
Read
Precharge
Row Active
*NOTE:
1. All input except CKE & DQM can be don't care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BA0,BA1.
: Don’t care
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Revision 0.1
September 2003