K5D5657ACM Datasheet, PDF (45/74 Pages) Samsung semiconductor – 256Mb NAND and 256Mb Mobile SDRAM

K5D5657ACM-F015
D. DEVICE OPERATIONS(continued)
SELF REFRESH
The self refresh is another refresh mode available in the
SDRAM. The self refresh is the preferred refresh mode for data
retention and low power operation of SDRAM. In self refresh
mode, the SDRAM disables the internal clock and all the input
buffers except CKE. The refresh addressing and timing are inter-
nally generated to reduce power consumption.
The self refresh mode is entered from all banks idle state by
asserting low on CS, RAS, CAS and CKE with high on WE. Once
the self refresh mode is entered, only CKE state being low mat-
ters, all the other inputs including the clock are ignored in order
to remain in the self refresh mode.
The self refresh is exited by restarting the external clock and then
asserting high on CKE. This must be followed by NOP's for a
minimum time of tSRFX before the SDRAM reaches idle state to
begin normal operation. In case that the system uses burst auto
refresh during normal operation, it is recommended to use burst
8192 auto refresh cycles for 256Mb and 512Mb, and burst 4096
auto refresh cycles for 128Mb and 64Mb immediately before
entering self refresh mode and after exiting in self refresh mode.
On the other hand, if the system uses the distributed auto
refresh, the system only has to keep the refresh duty cycle.
PrelAimdvinanacrye
MCP MEMORY
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Revision 0.1
September 2003