K5D5657ACM Datasheet, PDF (55/74 Pages) Samsung semiconductor – 256Mb NAND and 256Mb Mobile SDRAM

K5D5657ACM-F015
PrelAimdvinanacrye
MCP MEMORY
FUNCTION TRUTH TABLE (TABLE 2)
Current
State
CKE CKE
(n-1) n
CS
RAS CAS
H
X
X
X
X
L
H
H
X
X
L
H
L
H
H
Self
Refresh
L
H
L
H
H
L
H
L
H
L
L
H
L
L
X
L
L
X
X
X
H
X
X
X
X
All
L
H
H
X
X
Banks
L
H
L
H
H
Precharge
L
H
L
H
H
Power
Down
L
H
L
H
L
L
H
L
L
X
L
L
X
X
X
H
H
X
X
X
H
L
H
X
X
All
Banks
Idle
H
L
L
H
H
H
L
L
H
H
H
L
L
H
L
H
L
L
L
H
H
L
L
L
L
H
L
L
L
L
L
L
X
X
X
Any State
H
H
X
X
X
other than
H
L
X
X
X
Listed
above
L
H
X
X
X
L
L
X
X
X
WE Address
Action
Note
X
X Exit Self Refresh --> Idle after tsRFX(ABI)
X
X Exit Self Refresh --> Idle after tsRFX (ABI) 6
H
X Exit Self Refresh --> Idle after tsRFX (ABI) 6
L
X ILLEGAL
X
X ILLEGAL
X
X ILLEGAL
X
X NOP (Maintain Self Refresh)
X
X INVALID
X
X Exit Power Down --> ABI
H
X Exit Power Down --> ABI
7
L
X ILLEGAL
7
X
X ILLEGAL
X
X ILLEGAL
X
X NOP (Maintain Low Power Mode)
X
X Refer to Table 1
X
X Enter Power Down
H
X Enter Power Down
8
L
X ILLEGAL
8
X
X ILLEGAL
H
RA Row (& Bank) Active
H
X Enter Self Refresh
8
L OP Code Mode Register Access
X
X NOP
X
X Refer to Operations in Table 1
X
X Begin Clock Suspend next cycle
9
X
X Exit Clock Suspend next cycle
9
X
X Maintain Clock Suspend
Abbreviations : ABI = All Banks Idle, RA = Row Address
*NOTE:
6. CKE low to high transition is asynchronous.
7. CKE low to high transition is asynchronous if restarts internal clock.
A minimum setup time 1CLK + tSS must be satisfied before any command other than exit.
8. Power down and self refresh can be entered only from the all banks idle state.
9. Must be a legal command.
- 55 -
Revision 0.1
September 2003