K5D5657ACM Datasheet, PDF (28/74 Pages) Samsung semiconductor – 256Mb NAND and 256Mb Mobile SDRAM

K5D5657ACM-F015
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MCP MEMORY
READ ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code respectively. The command register
remains in Read ID mode until further commands are issued to it. Figure 11 shows the operation sequence.
Figure 11. Read ID Operation
CLE
CE
tCEA
WE
tAR
ALE
RE
I/Ox
tWHR
tREA
90h
00h
ECh
Address. 1cycle
Maker code
35h
Device code
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 12 below.
Figure 12. RESET Operation
tRST
R/B
I/Ox
FFh
Table4. Device Status
Operation Mode
After Power-up
Read 1
After Reset
Waiting for next command
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Revision 0.1
September 2003