M37281EKSP Datasheet, PDF (85/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
(2) OSD RAM (addresses 070016 to 07A716, 080016 to 0FFF16)
The OSD RAM for SPRITE consisting of 3 planes, is assigned to
addresses 070016 to 07A716. Each plane corresponds to each color
pallet selection bit and the color pallet of each dot is determined from
among 8 kinds.
The OSD RAM for character is allocated at addresses 080016 to
0FFF16, and is divided into a display character code specification
part, color code 1 specification part, and color code 2 specification
part for each block. Tables 8.11.5 and 8.11.6 show the contents of
the OSD RAM.
For example, to display 1 character position (the left edge) in block 1,
write the character code in address 080016, write color code 1 at
082016, and write color code 2 at 084016. The structure of the OSD
RAM is shown in Figure 8.11.23.
Note : For the layer 2 ’s OSD mode block with dot size of 1.5TC ✕ 1/2H and
1.5TC ✕ 1H, the 3nth (n = 1 to 10) character is skipped as compared
with ordinary block (blocks with dot size of 1TC ✕ 1/2H, or blocks on the
layer 1). Accordingly, maximum 22 characters are only displayed in 1
block. Blocks with dot size of 1TC ✕ 1/2H and 1TC ✕ 1H, or blocks on
the layer 1
However, note the following:
• In OSD mode
The character is not displayed, and only the left 1/3 part of the 22nd
character back ground is displayed in the 22nd’s character area.
When not displaying this background, set transparent for background.
• In CDOSD mode
The character is not displayed, and color pallet color specified by bit
3 to 6 of color code 1 can be output in the 22nd’s character area (left
1/3 part).
The RAM data for the 3nth character does not effect the display.
Any character data can be stored here (refer to Figure 8.11.22).
Rev.1.01 2003.07.16 page 85 of 170