M37281EKSP Datasheet, PDF (163/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Addresses 022016 to 022F16
Vertical Position Register 1i
b7 b6 b5 b4 b3 b2 b1 b0
Vertical position register 1i (VP1i) (i = 1 to 16) [Addresses 022016 to 022F16]
B
Name
0 _{Control bits of}
to _{vertical display}
7 _{start positions}
(VP1i0 to VP1i7)
(See note 1)
Functions
After reset R W
Vertical display start positions
(low-order 8 bits)
TH ✕
Indeterminate R W
(setting value of low-order 2 bits of VP2i ✕ 16²
+ setting value of low-order 4 bits of VP1i ✕ 16¹
+ setting value of low-order 4 bits of VP1i ✕ 16⁰)
Notes 1: Do not “0016” and “0116” to VP1i at VP2i = “00 16.”
2: TH is cycle of HSYNC.
3: VP2i is vertical position register 2i.
Addresses 023016 to 023F16
Vertical Position Register 2i
b7 b6 b5 b4 b3 b2 b1 b0
Vertical position register 2i (VP2i) (i = 1 to 16) [Addresses 023016 to 023F16]
B
Name
0, _{Control bits of}
1 _{vertical display}
start positions
(VP2i0, VP2i1)
(See note 1)
Functions
After reset R W
Vertical display start positions
(high-order 2 bits)
TH ✕
Indeterminate _{R W}
(setting value of low-order 2 bits of VP2i ✕ 16²
+ setting value of low-order 4 bits of VP1i ✕ 16¹
+ setting value of low-order 4 bits of VP1i ✕ 16⁰)
2 _{Nothing ic assigned. These bits are write disable bits.}
to _{When these bits are read out, the values are indeterminate.}
7
Notes 1: Do not set “0016” and “0116” to VP1i at VP2i = “00 16.”
2: TH is cycle of HSYNC.
3: VP1i is vertical position register 1i.
Indeterminate _{R —}
Rev.1.01 2003.07.16 page 163 of 170