M37281EKSP Datasheet, PDF (145/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Address 00E616
Caption Position Register
b7 b6 b5 b4 b3 b2 b1 b0
Caption Position Register (CPS) [Address 00E616]
B
Name
0 Caption position
to bits(CPS0 to CPS4)
4
5 Caption data latch
completion flag 2
(CPS5)
Functions
After reset
0
RW
RW
0: Data is not latched yet and a Indeterminate R —
clock-run-in is not determined.
1: Data is latched and a
clock-run-in is determined.
6, 7 Slice line mode
Refer to the corresponding
specification bits
Table (Table 8.10.1).
(in 1 field) (CPS6, CPS7)
0
RW
Address 00E916
Sync Pulse Counter Register
b7 b6 b5 b4 b3 b2 b1 b0
Sync pulse counter register (HC) [Address 00E916]
B
Name
Functions
0 Count value (HC0 to HC4)
to
4
5 Count source (HC5)
0: HSYNC signal
1: Composite sync signal
After reset ^{R W}
Indeterminate R —
0
RW
6, 7 Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are “0.”
0
R—
Address 00EA16
Clock Run-in Detect Register
b7 b6 b5 b4 b3 b2 b1 b0
Clock run-in detect register (CRD) [Address 00EA16]
B
Name
0 Test bits
to
2
3 Clock run-in detection
to bit(CRD3 to CRD7)
7
Functions
Read-only
After reset R W
0
R—
Number of reference clocks to
be counted in one clock run-in
pulse period.
0
R—
Rev.1.01 2003.07.16 page 145 of 170