M37281EKSP Datasheet, PDF (45/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
(3) RESTART condition generating procedure
➀Procedure example (The necessary conditions of the generating
procedure are described as the following ➁ to ➅.)
Execute the following procedure when the PIN bit is “0.”
LDM
LDA
SEI
STA
LDM
CLI
•
•
#$00, S1
—
S0
#$F0, S1
•
•
(Select slave receive mode)
(Taking out of slave address value)
(Interrupt disabled)
(Writing of slave address value)
(Trigger of RESTART condition generating)
(Interrupt enabled)
➁Select the slave receive mode when the PIN bit is “0.” Do not write
“1” to the PIN bit. Neither “0” nor “1” is specified for the writing to
the BB bit.
The TRX bit becomes “0” and the SDA pin is released.
➂The SCL pin is released by writing the slave address value to the
I²C data shift register. Use “STA,” “STX” or “STY” of the zero page
addressing instruction for writing.
➃Use “LDM” instruction for setting trigger of RESTART condition gen-
erating.
➄Write the slave address value of above ➂ and set trigger of RE-
START condition generating of above ➃ continuously shown the
above procedure example.
➅Disable interrupts during the following two process steps:
• Writing of slave address value
• Trigger of RESTART condition generating
(4) STOP condition generating procedure
➀Procedure example (The necessary conditions of the generating
procedure are described as the following ➁ to ➃.)
•
•
SEI
LDM #$C0, S1
NOP
LDM #$D0, S1
CLI
•
•
(Interrupt disabled)
(Select master transmit mode)
(Set NOP)
(Trigger of STOP condition generating)
(Interrupt enabled)
➁Write “0” to the PIN bit when master transmit mode is select.
➂Execute “NOP” instruction after setting of master transmit mode.
Also, set trigger of STOP condition generating within 10 cycles af-
ter selecting of master trasmit mode.
➃Disable interrupts during the following two process steps:
• Select of master transmit mode
• Trigger of STOP condition generating
(5) Writing to I²C status register
Do not execute an instruction to set the PIN bit to “1” from “0” and an
instruction to set the MST and TRX bits to “0” from “1” simultaneously.
It is because it may enter the state that the SCL pin is released and
the SDA pin is released after about one machine cycle. Do not ex-
ecute an instruction to set the MST and TRX bits to “0” from “1” si-
multaneously when the PIN bit is “1.” It is because it may become the
same as above.
(6) Process of after STOP condition generat-
ing
Do not write data in the I²C data shift register S0 and the I²C status
register S1 until the bus busy flag BB becomes “0” after generating
the STOP condition in the master mode. It is because the STOP
condition waveform might not be normally generated. Reading to the
above registers do not have the problem.
Rev.1.01 2003.07.16 page 45 of 170