M37281EKSP Datasheet, PDF (7/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
7. PIN DESCRIPTION
Table 7.1 Pin Description
Pin
VCC,
(AVCC,)
VSS
CNVSS
RESET
Name
Power source
CNVSS
Reset input
XIN
XOUT
Clock input
Clock output
P00/
I/O port P0
PWM4–
P02/PWM6,
P03/PWM7,
P04/
PWM0–
8-bit PWM output
P07/PWM3
P10/OUT2,
P11/SCL1,
P12/SCL2,
P13/SDA1,
P14/SDA2,
P15/G0,
P16/INT3/
B0,
P17/SIN/R0
I/O port P1
OSD output
Multi-master
I²C-BUS interface
External interrupt
input
Serial I/O data
input
P20–P23
P24/AD3–
P26/AD1,
P27/AD5
P30/AD7,
P31/AD8
I/O port P2
Analog input
I/O port P3
P40/AD4,
P41/INT2,
P42/TIM2,
P43/TIM3,
P44/INT1,
P45/SOUT,
P46/SCLK
Analog input
Input port P4
Analog input
External interrupt
input
External clock input
for timer
Serial I/O data
output
Serial I/O
synchronous clock
input/output
Input/
Output
Input
Input
Output
I/O
Output
I/O
Output
I/O
Input
Input
I/O
Input
I/O
Input
Input
Input
Input
Input
Output
I/O
Functions
Apply voltage of 5 V ± 10 % (typical) to VCC (AVCC ) , and 0 V to VSS.
( ) ...M37281EKSP
Connected to VSS.
To enter the reset state, the reset input pin must be kept at a LOW for 2 µs or more
(under normal VCC conditions).
If more time is needed for the quartz-crystal oscillator to stabilize, this LOW condition
should be maintained for the required time.
This chip has an internal clock generating circuit. To control generating frequency, an
external ceramic resonator or a quartz-crystal oscillator is connected between pins XIN
and XOUT. If an external clock is used, the clock source should be connected to the XIN
pin and the XOUT pin should be left open.
Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually
programmed as input or output. At reset, this port is set to input mode. The output structure
of P03 is CMOS output, that of P00–P02 and P04–P07 are N-channel open-drain output
(See note.)
Pins P00–P03 and P04–P07 are also used as 8-bit PWM output pins PWM4–PWM7 and
PWM0–PWM3 respectively. The output structure of PWM0–PWM6 is N-channel open-drain
output. And the output structure of PWM7 is CMOS output.
Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure of P10 and P15–P17 is CMOS output, that of P11–P14 is N-channel open-drain
output (See note.)
Pin P10, P15–P17 are also used as OSD output pins OUT2, G0, B0, R0, respectively. The
output structure is CMOS output.
Pin P11–P14 are used as SCL1, SCL2, SDA1 and SDA2 respectively, when multi-master
I²C-BUS interface is used. The output structure is N-channel open-drain output.
Pin P16 is also used as INT extemal interrupt input pin INT3.
Pin P17 is also used as serial I/O data input pin SIN.
Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure is CMOS output (See note.)
Pins P24–P26, P27 are also used as analog input pins AD3–AD1, AD5 respectively.
Ports P30 and P31 are 2-bit I/O ports and have basically the same functions as port P0. The
output structure is CMOS output (See note.)
Pins P30, P31 are also used as analog input pins AD7, AD8 respectively.
Ports P40–P46 are a 7-bit input port.
Pin P40 is also used as analog input pin AD4.
Pins P41, P44 are also used as INT external interrupt input pins INT2, INT1.
Pins P42 and P43 are also used as INT external clock input pins TIM2, TIM3 for timer
respectively.
Pin P45 is used as serial I/O data output pin SOUT. The output structure is N-channel open-
drain output.
Pin P46 is used as serial I/O synchronous clock input/output pin SCLK. The output structure
is N-channel open-drain output.
Rev.1.01 2003.07.16 page 7 of 170