M37281EKSP Datasheet, PDF (54/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
8.9 ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses can be
corrected, a program for correction is stored in the ROM correction
vector in RAM as the top address. The ROM correction vectors are 2
vectors.
Vector 1 : address 02C016
Vector 2 : address 02E016
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction vector as the top address,
the main program branches to the correction program stored in the
ROM memory for correction. To return from the correction program
to the main program, the op code and operand of the JMP instruction
(total of 3 bytes) are necessary at the end of the correction program.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1: Specify the first address (op code address) of each instruction as the
ROM correction address.
2: Use the JMP instruction (total of 3 bytes) to return from the correction
program to the main program.
3: Do not set the same ROM correction address to vectors 1 and 2.
4: For the M37281MKH-XXXSP and M37281EKSP, when using the ex-
pansion ROM (BK7 = “1”), the ROM correction function do not oper-
ate used for addresses 100016 to1FFF16. Note that on programming.
ROM correction address 1 (high-order) 020C16
ROM correction address 1 (low-order) 020D16
ROM correction address 2 (high-order) 020E16
ROM correction address 2 (low-order) 020F16
Fig. 8.9.1 ROM Correction Address Registers
ROM Correction Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
00
ROM correction enable register (RCR) [Address 021016]
B
Name
0 Vector 1 enable bit (RCR0)
1 Vector 2 enable bit (RCR1)
2, 3 Fix these bits to “0.”
Functions
0: Disabled
1: Enabled
0: Disabled
1: Enabled
After reset R W
0
RW
0
RW
0
RW
4 Nothing is assigned. These bits are write disable bits. When
to these bits are read out, the values are “0.”
0
R—
7
Fig. 8.9.2 ROM Correction Enable Register
Rev.1.01 2003.07.16 page 54 of 170