M37281EKSP Datasheet, PDF (123/172 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
10. ABSOLUTE MAXIMUM RATINGS
Symbol
VCC, (AVCC)
VI
VI
VO
IOH
IOL1
IOL2
IOL3
IOL4
Pd
Topr
Tstg
Parametear
Power source voltage VCC, (See note 1)
Input voltage
CNVSS
Input voltage
P00–P07, P10–P17, P20–P27,
P30, P31, P40–P46, P64, P63,
P_{__}7_{_}0_{_} –_{_} P_{_}72, XIN, HSYNC, VSYNC,
RESET
Output voltage
P00–P07, P10–P17, P20–P27,
P30, P31, P52–P55, SOUT, SCLK,
XOUT, OSC2
Circuit current
P52–P55, P10, P03, P15–P17,
P20–P27, P30, P31
Circuit current
P52–P57, P10, P03, P15–P17,
P20–P27, P65–P67, SOUT, SCLK
Circuit current
P11–P14
Circuit current
P00–P02, P04–P07
Circuit current
P30, P31
Power dissipation
Operating temperature
Storage temperature
Conditions
All voltages are
based on VSS.
Output transistors
are cut off.
Ta = 25 °C
Ratings
Unit
–0.3 to 6
V
–0.3 to 6
V
–0.3 to VCC + 0.3
V
–0.3 to VCC + 0.3
V
0 to 1 (See note 2)
mA
0 to 2 (See note 3)
mA
0 to 6 (See note 3)
mA
0 to 1 (See note 3)
mA
0 to 10 (See note 4)
mA
550
mW
–10 to 70
°C
–40 to 125
°C
11. RECOMMENDED OPERATING CONDITIONS (Ta = –10 °C to 70 °C, VCC = 5 V ± 10 %, unless otherwise noted)
Symbol
Parameter
VCC, (AVCC)
VCC, (AVCC)
VSS
VIH1
VIH2
VIL1
VIL2
VIL3
IOH
IOL1
IOL2
IOL3
IOL4
f(XIN)
f(XCIN)
fosc
RL
fhs1
fhs2
fhs3
fhs4
VI
Power source voltage (See note 1, 5), During CPU, OSD, data slicer operation
RAM hold voltage (when clock is stopped)
Power source voltage
HIGH input voltage
P00–P07, P10–P17, P20–P27, P30, P31,
P40–P46, P63, P64, P70–P72, HSYNC,
VSYNC, RESET, XIN
HIGH input voltage
SCL1, SCL2, SDA1, SDA2
LOW input voltage
P00–P07, P10–P17, P20–P27, P30, P31,
P40–P46, P63, P64, P70–P72
LOW input voltage
SCL1, SCL2, SDA1, SDA2
LOW input voltage (See note 7)
RESET, XIN, OSC1, HSYNC, VSYNC,
INT1–INT3, TIM2, TIM3, SCLK, SIN
HIGH average output current (See note 2)
P52–P55, P10, P03, P15–P17,
P20–P27, P30, P31
LOW average output current (See note 3)
P51–P55, P10, P03, P15–P17,
P20–P27, SOUT, SCLK
LOW average output current (See note 3) P11–P14
LOW average output current (See note 3) P00–P02, P04–P07
LOW average output current (See note 4) P30, P31
Oscillation frequency (for CPU operation) (See note 6) XIN
Oscillation frequency (for sub-clock operation)
Oscillation frequency (for OSD)
OSC1
XCIN
LC oscillating mode
Ceramic oscillating mode
Load resistance
During R,G,B analog output
Input frequency
TIM2, TIM3, INT1–INT3
Input frequency
SCLK
Input frequency
SCL1, SCL2
Input frequency
Horizontal sync. signal of video signal
Input amplitude video signal
CVIN
Min.
4.5
2.0
0
0.8VCC
Limits
Typ.
5.0
0
Unit
Max.
5.5 V
5.5 V
0V
VCC V
0.7VCC
0
0
0
7.9
29
11.0
25.5
20.0
15.262
1.5
VCC V
0.4 VCC V
0.3 VCC V
0.2 VCC V
1 mA
2 mA
6 mA
1 mA
10 mA
8.0
8.1 MHz
32
35 kHz
27.0
26.5
MHz
27.5
15.734
2.0
100
1
400
16.206
2.5
kHz
MHz
kHz
kHz
V
Rev.1.01 2003.07.16 page 123 of 170