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HN29V1G91T-30 Datasheet, PDF (85/92 Pages) Renesas Technology Corp – 128M X 8-bit AG-AND Flash Memory
HN29V1G91T-30
Notes on usage
1. Prohibition of undefined command input
The commands listed in the command definition can only be used in this device. It is prohibited to issue a
command that is not defined in the list. If an undefined command is issued, the data held in the device may
be lost.
Only the commands defined can be issued, in only defined timings. Otherwise, illegal operations may
occur.
2. Limitation of command input in the busy state
In the busy state, following two commands are acceptable. Do not issue any other command except below
two commands.
• Status read 70h, 71h, 72h, 73h, 74h, 75h, 76h
• Read command FFh
3. Commands limitation after commands (80h, 85h) are input at the first cycle of a program
After commands (80h, 85h) are input at the first cycle of a program, only the second cycle of the program
commands (10h, 11h, 15h) and reset command (FFh) can be used. After a command 80h or 85h is input,
the commands are prohibit.
4. R/B (Ready/busy) pin handing
R/B is an open-drain output pin, and it should be pulled up to VCC with a resistance (more than 2kΩ).
5. Notes on RE signal
If the RE clock is sent before the address is input, the internal read operation may start unintentionally.
Be sure to send the RE clock after the address is input.
If the RE clock is input after the data of the last address is read during the read operation, invalid data is
output.
6. Notes on Address taking
This product takes the address data by four cycles, and when five cycles or more are input, the address data
since the fifth cycle becomes invalid.
7. Deep standby mode
During command waiting or standby state, when RES pin goes to low, the device transfers to deep standby
state.
When RES goes to high, the device returns form the deep standby state.
During command execution, going RES low stops command operation. If RES goes to low during
Rev.4.00, Jun.20.2004, page 85 of 89