HN29V1G91T-30 Datasheet, PDF (23/92 Pages) Renesas Technology Corp – 128M X 8-bit AG-AND Flash Memory

HN29V1G91T-30
Copy Back Program with Data Output
When copy back program operation is executed, it is possible to confirm the source copy data outputting
one which has transferred to the data register to external. It is possible to output the source copy data after
storing it to the data register and inputting E0h command following 06h command and address input with 4
cycles. Program to post-copy page address is executed by writing 10h command following 85h command
and post copy address input with 4 cycles after data output. Address for post-copy must be chosen page
address which has erased (FFh). Copy data can be updated after post copy address input with 4 cycles and
the data input.
R/B
column J page M
I/O
00h CA1 CA2 RA1 RA2 35h
(1)
Bank 0
column J’ page M
06h CA1 CA2 RA1 RA2 E0h D_OUT
column K page N
D_OUT 85h CA1 CA2 RA1 RA2 10h
Bank 1
(2)
Bank 2
(3)
Bank 3
70h
status
out
Memory array
Data register
Page M
(1)
Bank 0
Bank 1
Bank 2
Bank 3
Memory array
Data register
column J’ (2)
D_{OUT Bank 0}
Memory array
Program
Page N
(3)
Data register
Bank 1
Bank 2
Note: 1. Post copy address must be specified one in same bank.
Bank 3
Rev.4.00, Jun.20.2004, page 23 of 89