HN29V1G91T-30 Datasheet, PDF (22/92 Pages) Renesas Technology Corp – 128M X 8-bit AG-AND Flash Memory

HN29V1G91T-30
Copy Back Program with Random Data Input In a Page
Source copy data which has transferred to the data register can be updated when copy back program
operation is executed.
Memory array data which has taken out to the data register is updated to the input data after storing source
copy data to the data register and inputting the data following 85h command and 4 address input with 4
cycles. 1 byte data or more must be input when random data input is executed. Program to post-copy page
address is executed by writing 10h command after data input.
Address for post-copy must be chosen page address which has erased (FFh).
CLE
CE
WE
ALE
RE
Column Page
address J address M
Column Page
address K address N
Column
address L
I/O
00h CA1 CA2 RA1 RA2 35h 85h CA1 CA2 RA1 RA2 D_IN
D_IN 85h CA1 CA2 D_IN
D_IN 10h 70h status
(2)
R/B
Memory array
Data register
Memory array
(1)
Bank 0
Page M
(1)
Bank 0
Bank 1
Bank 1
Bank 2
(3)
Bank 3
Bank 2
Bank 3
Data register
D_IN (2) D_IN
column K column L
Bank 0
Memory array
Data register
Page N
Program (3)
Bank 1
Bank 2
Note: 1. Post copy address must be specified one in same bank.
Bank 3
Rev.4.00, Jun.20.2004, page 22 of 89