HN29V1G91T-30 Datasheet, PDF (2/92 Pages) Renesas Technology Corp – 128M X 8-bit AG-AND Flash Memory

HN29V1G91T-30
• Low power dissipation
 Read I_CC1 (50 ns cycle): 10 mA (typ)
 Read I_CC2 (35 ns cycle): 15 mA (typ)
 Program I_CC3 (single bank): 10 mA (typ)
 Program I_CC4 (Multi bank): 20 mA (typ)
 Erase I_CC5 (single bank): 10 mA (typ)
 Erase I_CC6 (Multi bank): 15 mA (typ)
 Standby I_SB1 (TTL): 1 mA (max)
 Standby I_SB2 (CMOS): 50 µA (max)
 Deep Standby I_SB3: 5 µA (max)
• Program time: 600 µs (typ) (Single/Multi bank)
 transfer rate: 10 MB/s (Multi bank)
• Erase time: 650 µs (typ) (Single/Multi bank)
• The following architecture is required for data reliability
 Error correction: 3 bit error correction per 512byte are recommended.
 Block replacement: When an error occurs in program page, block replacement including
corresponding page should be done. When an error occurs in erase operation, future access to this
bad block is prohibited. It is required to manage it creating a table or using another appropriate
scheme by the system (Valid blocks: Initial valid blocks for more than 98% per Bank.
Replacement blocks must be ensured more than 1.8% of valid blocks per Bank).
 Wear leveling: Wear leveling is to level Program and Erase cycles in one block in order to reduce
the burden for one block and let the device last for long time. Actually, it does detect the block
which is erased and rewritten many times and replace it with less accessed block.
To secure 10⁵ cycles as the program/erase endurance, need to control not to exceed Program and
Erase cycles to one block. You should adopt wear leveling once in 5000 Program and Erase cycles.
It is better to program it as a variable by software.
• Program/Erase Endurance: 10⁵ cycles
• Package line up
 TSOP: TSOP Type-I 48pin package (TFP-48DA)
Ordering Information
Type No.
HN29V1G91T-30
Operating voltage (V_CC)
2.7 V to 3.6 V
Organization
×8
Package
12.0 × 20.00 mm²
0.5 mm pitch
48-pin plastic TSOPI (TFP-48DA)
Rev.4.00, Jun.20.2004, page 2 of 89