4513_03 Datasheet, PDF (49/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

HARDWARE
FUNCTION BLOCK OPERATIONS
SERIAL I/O
The 4513/4514 Group has a built-in clock synchronous serial I/O
which can serially transmit or receive 8-bit data.
Serial I/O consists of;
• serial I/O register SI
• serial I/O mode register J1
• serial I/O transmission/reception completion flag (SIOF)
• serial I/O counter
Registers A and B are used to perform data transfer with internal
CPU, and the serial I/O pins are used for external data transfer.
The pin functions of the serial I/O pins can be set with the register
J1.
Table 11 Serial I/O pins
Pin
Pin function when selecting serial I/O
P20/SCK
P21/SOUT
P22/SIN
Clock I/O (SCK)
Serial data output (SOUT)
Serial data input (SIN)
Note: Input ports P20–P22 can be used regardless of register J1.
Division circuit MR3
(divided by 2)
1
Internal clock
generation circuit
Instruction clock
XIN
0
(divided by 3)
P20/SCK
SCK
J12
1
1/4
0
1/8
Serial I/O mode register J1
J13 J12 J11 J10
Synchronous
circuit
Serial I/O counter (3)
SIOF Serial I/O interrupt
P21/SOUT
SOUT
P22/SIN
SIN
MSB Serial I/O register SI (8) LSB
TSIAB
TABSI
J11 J10
Register B (4)
Register A (4)
Note: The output structure of SCK and SOUT pins is N-channel open-drain.
Fig. 22 Serial I/O structure
Table 12 Serial I/O mode register
Serial I/O mode register J1
0
J13
Not used
1
Serial I/O internal clock dividing ratio
0
J12
selection bit
1
0
J11
Serial I/O port selection bit
1
0
J10 Serial I/O synchronous clock selection bit
1
Note: “R” represents read enabled, and “W” represents write enabled.
at reset : 00002
at RAM back-up : state retained
R/W
This bit has no function, but read/write is enabled.
Instruction clock signal divided by 8
Instruction clock signal divided by 4
Input ports P20, P21, P22 selected
Serial I/O ports SCK, SOUT, SIN/input ports P20, P21, P22 selected
External clock
Internal clock (instruction clock divided by 4 or 8)
1-36
4513/4514 Group User’s Manual