4513_03 Datasheet, PDF (131/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.3 Timers
(3) Timer control register W1
The timer 1 count start synchronous circuit control bit is assigned to bit 0, the timer 1 control bit is
assigned to bit 1, the prescaler dividing ratio selection bit is assigned to bit 2, and the prescaler
control bit is assigned to bit 3.
Set the contents of this register through register A with the TW1A instruction. The TAW1 instruction
can be used to transfer the contents of register W1 to register A.
Table 2.3.3 shows the timer control register W1.
Table 2.3.3 Timer control register W1
Timer control register W1
at reset : 00002
at RAM back-up : 00002
W13 Prescaler control bit
0 Stop (state initialized)
1 Operating
Prescaler dividing ratio selection 0 Instruction clock divided by 4
W12
bit
1 Instruction clock divided by 16
W11 Timer 1 control bit
0 Stop (state retained)
1 Operating
Timer 1 count synchronous circuit 0 Count start synchronous circuit not selected
W10
control bit
1 Count start synchronous circuit selected
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
(4) Timer control register W2
The timer 2 count source selection bits are assigned to bits 0 and 1, and the timer 2 control bit is
assigned to bit 3.
Set the contents of this register through register A with the TW2A instruction. The TAW2 instruction
can be used to transfer the contents of register W2 to register A.
Table 2.3.4 shows the timer control register W2.
Table 2.3.4 Timer control register W2
Timer control register W2
at reset : 00002 at RAM back-up : state retained R/W
W23 _{Timer 2 control bit}
0 Stop (state retained)
1 Operating
W22 Not used
0
This bit has no function, but read/write is enabled.
1
W21
W20
W21 W20
Count source
0
Timer 2 count source selection ₀
bits
1
0 Timer 1 underflow signal
1 Prescaler output
0 CNTR0 input
1 1 16-bit timer (WDT) underflow signal
Note: “R” represents read enabled, and “W” represents write enabled.
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4513/4514 Group User’s Manual