4513_03 Datasheet, PDF (145/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.4 Serial I/O
2.4.3 Operation description
Figure 2.4.2 shows the serial I/O connection example, Figure 2.4.3 shows the serial I/O register state, and
Figure 2.4.4 shows the serial I/O transfer timing.
Master (internal clock selected)
4513/4514
Slave (external clock selected)
4513/4514
Control signal
D5
D5
SCK
SCK
SOUT
SIN
SIN
SOUT
Note: The control signal is used to inform the master by the pin level
that the slave is in a ready state to receive.
The 4513/4514 Group does not have a control pin exclusively
used for serial I/O.
Accordingly, if a control signal is required, use the normal input/output ports.
Fig. 2.4.2 Serial I/O connection example
Master (M7–M0: Transfer data)
Serial I/O register (SI)
M7 M6 M5 M4 M3 M2 M1 M0
SIN pin
SOUT pin
Slave (S7–S0: Transfer data)
SOUT pin
Serial I/O register (SI)
S7 S6 S5 S4 S3 S2 S1 S0
SIN pin
M7 M6 M5 M4 M3 M2 M1 M0
∗ ^{M7 M6 M5 M4 M3 M2 M1}
Transfer data setting
Transfer starts
Falling of clock
S7 S6 S5 S4 S3 S2 S1 S0
∗ ^{S7 S6 S5 S4 S3 S2 S1}
S0 M7 M6 M5 M4 M3 M2 M1
∗ S0 ^M7 M6 M5 M4 M3 M2
Rising of clock
Falling of clock
M0 S7 S6 S5 S4 S3 S2 S1
∗ ^{M0 S7 S6 S5 S4 S3 S2}
S7 S6 S5 S4 S3 S2 S1 S0
Transfer completes
M7 M6 M5 M4 M3 M2 M1 M0
Fig. 2.4.3 Serial I/O register state when transmitting/receiving
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4513/4514 Group User’s Manual