4513_03 Datasheet, PDF (138/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.3 Timers
ΠDisable Interrupts
Timer 3 and timer 4 interrupt are temporarily disabled.
Interrupt enable flag INTE “0”
All interrupts disabled (DI instruction)
Interrupt control register V2
b3
!!
b0
00
Timer 3 and timer 4 interrupt occurrence disabled
(TV2A instruction)
 Stop Timer Operation
Timer is temporarily stopped.
Dividing ratio of prescaler is selected.
Timer 3 count source is selected.
Timer 4 count source is selected.
Timer control register W3
b3
b0 _{Timer 3 stop (TW3A instruction)}
0 ! 0 1 _{Prescaler selected for count source}
Timer control register W4
b3
0
!
0
b0
0
Timer 4 stop (TW4A instruction)
Timer 3 underflow selected for count source
Timer control register W1
b3
1
0
b0
!!
Instruction clock divided by 4 selected
(TW1A instruction)
Ž Set Timer Value, Select CNTR1 Output
CNTR1 output is selected.
Timer 3 and timer 4 count time are set.
b3
b0
Timer control register W6 1 1 ! ! CNTR1 output selected (TW6A instruction)
Timer 3 reload register R3 “2916” _{Timer count value 41 set (T3AB instruction)}
Timer 3 reload register R4 “FF16” _{Timer count value 255 set (T4AB instruction)}
 Start Timer Operation
Timer 3 and timer 4 temporarily stopped are restarted.
b3
b0
Timer control register W3 ^{1 ! 0 1} Timer 3 operation start (TW3A instruction)
b3
b0
Timer control register W4 1 ! 0 0 Timer 4 operation start (TW4A instruction)
 Enable Interrupts
Interrupt enable flag INTE _{“1”}
All interrupts enabled (EI instruction)
“!”: it can be “0” or “1.”
Fig. 2.3.6 CNTR0 output control setting example
4513/4514 Group User’s Manual
2-35