4513_03 Datasheet, PDF (143/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.4 Serial I/O
2.4 Serial I/O
The 4513/4514 Group has a clock-synchronous serial I/O which can be used to transmit and receive 8-bit
data.
This section describes serial I/O functions, related registers, application examples using serial I/O and
notes.
2.4.1 Carrier functions
Serial I/O consists of the serial I/O register SI, serial I/O mode register J1, serial I/O transmit/receive
completion flag SIOF and serial I/O counter.
A clock-synchronous serial I/O uses the shift clock generated by the clock control circuit as a synchronous
clock. Accordingly, the data transmit and receive operations are synchronized with this shift clock.
In transmit operation, data is transmitted bit by bit from the SOUT pin synchronously with the falling edges
of the shift clock.
In receive operation, data is received bit by bit from the SIN pin synchronously with the rising edges of the
shift clock.
Note: 4513/4514 Group only supports LSB-first transmission and reception.
s Shift clock
When using the internal clock of 4513/4514 Group as a synchronous clock, eight shift clock pulses
are output from the SCK pin when a transfer operation is started. Also, when using some external
clock as a synchronous clock, the clock that is input from the SCK pin is used as the shift clock.
s Data transfer rate (baudrate)
When using the internal clock, the data transfer rate can be determined by selecting the instruction
clock divided by 4 or 8.
When using an external clock, the clock frequency input to the SCK pin determines the data transfer
rate.
Figure 2.4.1 shows the serial I/O block diagram.
Division circuit MR3
(divided by 2)
1
Internal clock
generation circuit
Instruction clock
XIN
0
(divided by 3)
P20/SCK
SCK
J12
1
1/4
0
1/8
Serial I/O mode register J1
J13 J12 J11 J10
Synchronous
circuit
Serial I/O counter (3)
SIOF Serial I/O interrupt
P21/SOUT
SOUT
P22/SIN
SIN
MSB Serial I/O register SI (8) LSB
TSIAB
TABSI
J11 J10
Register B (4)
Register A (4)
Note: The output structure of SCK and SOUT pins is N-channel open-drain.
Fig. 2.4.1 Serial I/O block diagram
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4513/4514 Group User’s Manual