4513_03 Datasheet, PDF (127/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.2 Interrupts
ΠDisable Interrupts
Timer 4 interrupt is temporarily disabled.
Interrupt enable flag INTE “0”
All interrupts disabled (DI instruction)
b3 b0 _{Timer 4 interrupt occurrence disabled}
Interrupt control register V2 ! ! 0 ! _{(TV2A instruction)}
 Stop Timer Operation
Timer 4, timer 3 and prescaler are temporarily stopped.
Dividing ratio of prescaler is selected.
Timer control register W1
b3
0
1
!
b0
!
Prescaler stop (TW1A instruction)
Prescaler divided by 16 selected
Timer control register W3
b3
0
!
0
b0
1
Timer 3 stop (TW3A instruction)
Prescaler selected for count source
Timer control register W4
b3
0
!
0
b0
0
Timer 4 stop (TW4A instruction)
Timer 3 underflow signal selected for count source
Ž Set Timer Value
Timer 3 and timer 4 count times are set. (The formula is shown gA below.)
Timer 3 reload register R3 ^{“5216”} Timer count value 82 set (T3AB instruction)
Timer 4 reload register R4 ^{“F916”} Timer count value 249 set (T4AB instruction)
 Clear Interrupt Request
Timer 4 interrupt activated condition is cleared.
Timer 4 interrupt request flag T4F “0”
Timer 4 interrupt activated condition cleared
(SNZT4 instruction)
Note when the interrupt request is cleared
When  is executed, considering the skip of the next instruction according to the
interrupt request flag T4F, insert the NOP instruction after the SNZT4 instruction.
 Start Timer 4 Operation
Timer 4, timer 3 and prescaler temporarily stopped are restarted.
b3
b0
Timer control register W4 ^{1 ! 0 0 Timer 4 operation start (TW4A instruction)}
b3
b0
Timer control register W3 1 ! 0 1 Timer 3 operation start (TW3A instruction)
b3
b0
Timer control register W1 1 1 ! ! Prescaler operation start (TW1A instruction)
‘ Enable Interrupts
The timer 4 interrupt which is temporarily disabled is enabled.
Interrupt control register V2
b3
b0
!! 1 !
Timer 4 interrupt occurrence enabled
(TV2A instruction)
Interrupt enable flag INTE “1”
All interrupts enabled (EI instruction)
Constant period interrupt execution start
gA The prescaler dividing ratio, time 3 count value and timer 4 count value to make the interrupt occur
every 250 ms are set as follows.
250 ms ≅ (4.0 MHz) ^–1 !
3!
16 ! (82+1) ! (249+1)
System clock Instruction Prescaler Timer 3 Timer 4
clock
dividing count count
ratio
value value
“!”: it can be “0” or “1.”
Fig. 2.2.8 Timer 4 constant period interrupt setting example
2-24
4513/4514 Group User’s Manual