4513_03 Datasheet, PDF (125/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.2 Interrupts
ΠDisable Interrupts
Timer 2 interrupt is temporarily disabled.
Interrupt enable flag INTE “0”
b3
b0
Interrupt control register V1 0 ! ! !
All interrupts disabled (DI instruction)
Timer 2 interrupt occurrence disabled
(TV1A instruction)
 Stop Timer Operation
Timer is temporarily stopped.
Timer 2 count source is selected.
b3
b0
Timer control register W2 0 ! 1 1
Timer 2 stop (TW2A instruction)
16-bit timer (WDT) underflow signal selected
for count source
Ž Set Timer Value
Timer 2 count time is set. (The formula is shown gA below.)
Timer 2 reload register R2 “2716” Timer count value 39 set (T2AB instruction)
 Clear Interrupt Request
Timer 2 interrupt activated condition is cleared.
Timer 2 interrupt request flag T2F “0”
Timer 2 interrupt activated condition cleared
(SNZT2 instruction)
Note when the interrupt request is cleared
When  is executed, considering the skip of the next instruction according to the
interrupt request flag T2F, insert the NOP instruction after the SNZT2 instruction.
 Start Timer 2 Operation
Timer 2 temporarily stopped is restarted.
b3
b0
Timer control register W2 1 ! 1 1 Timer 2 operation start (TW2A instruction)
‘ Enable Interrupts
The timer 2 interrupt which is temporarily disabled is enabled.
Interrupt control register V1
b3
b0
1 ! !!
Timer 2 interrupt occurrence enabled
(TV1A instruction)
Interrupt enable flag INTE “1”
All interrupts enabled (EI instruction)
Constant period interrupt execution start
gA The timer 2 count value to make the interrupt occur every about 2 s is set as follows.
2 s ≅ (4.0 MHz) ^–1! 3
! 2¹⁶ ! (39+1)
System clock Instruction 16-bit Timer 2
clock
fixed
count
dividing value
frequency
“!”: it can be “0” or “1.”
Fig. 2.2.6 Timer 2 constant period interrupt setting example
2-22
4513/4514 Group User’s Manual