4513_03 Datasheet, PDF (154/210 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.5 A-D converter
2.5.2 A-D converter application examples
(1) A-D conversion mode
Outline: Analog input signal from a sensor can be converted into digital values.
Specifications: Analog voltage values from a sensor is converted into digital values by using a 10-
bit successive comparison method. Use the AIN0 pin for this analog input.
Figure 2.5.2 shows the A-D conversion mode setting example.
ΠDisable Interrupts
A-D interrupt is temporarily disabled.
Interrupt enable flag INTE “0”
All interrupts disabled (DI instruction)
Interrupt control register V2
b3
!
0
b0
!!
A-D interrupt occurrence disabled
(TV2A instruction)
 Set A-D Converter
A-D conversion mode is selected to A-D operation mode.
Analog input pin AIN0 is selected.
b3
b0
A-D control register Q2 0 ! ! ! A-D conversion mode selected (TQ2A instruction)
b3
b0
A-D control register Q1 ! 0 0 0 AIN0 selected (TQ1A instruction)
Ž Clear Interrupt Request
A-D interrupt activated condition is cleared.
A-D conversion completion flag ADF _{“0”}
A-D conversion interrupt activated condition cleared
(SNZAD instruction)
Note when the interrupt request is cleared
When Ž is executed, considering the skip of the next instruction according to the
flag ADF, insert the NOP instruction after the SNZAD instruction.
When interrupt is
not used
 Set Interrupt
Interrupts except A-D conversion is
enabled (EI instruction)
When interrupt is used
 Set Interrupt
A-D conversion interrupt temporarily disabled is enabled.
b3
b0
Interrupt control register V2
! 1!!
A-D interrupt occurrence enabled
(TV2A instruction)
Interrupt enable flag INTE “1”
All interrupts enabled
(EI instruction)
 Start A-D Conversion
A-D conversion operation is started (ADST instruction).
When interrupt is not used
‘ Check A-D Interrupt Request
A-D conversion completion flag is
checked (SNZAD instruciton)
When interrupt is used
‘ A-D Conversion Interrupt Occur
’ Execute A-D Conversion
High-order 8 bits of register AD → register A and register B (TABAD instruction)
Low-order 2 bits of register AD → high-order 2 bits of register A (TALA instruction)
“0” is set to low-order 2 bits of register A
When A-D conversion is executed by the same channel,  to ’ is repeated.
When A-D conversion is executed by the another channel, Œ to ’ is repeated.
“!”: it can be “0” or “1.”
Fig. 2.5.2 A-D conversion mode setting example
4513/4514 Group User’s Manual
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