SAA6721E Datasheet, PDF (9/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
SYMBOL
PBG7
PBG6
PBG5
PBG4
PBG3
PBG2
PBG1
PBG0
PBB7
PBB6
PBB5
PBB4
PBB3
PBB2
PBB1
PBB0
SCL
SDA
SAD
OVCLK
OVVS
OVHS
OVACT
OVA0
OVA1
OVA2
OVB0
OVB1
OVB2
MCLKO
RAS
CAS
PIN
PORT
Y7 panel interface
V8 panel interface
W8 panel interface
Y8 panel interface
V9 panel interface
W9 panel interface
U9 panel interface
Y9 panel interface
V10 panel interface
W10 panel interface
Y10 panel interface
Y11 panel interface
U11 panel interface
W11 panel interface
V11 panel interface
Y12 panel interface
V18 I²C-bus interface
W18
Y17
Y16 overlay
W16 overlay
V15 overlay
V16 overlay
Y14 overlay
V13 overlay
W13 overlay
Y15 overlay
V14 overlay
W14 overlay
A17 memory interface
A18 memory interface
C17 ^{memory interface}
WE
DQM
D16 memory interface
T17 memory interface
I/O⁽¹⁾
output
output
output
output
output
output
output
output
output
output
output
output
output
output
output
output
input
input/output
input
output
output
output
input
input
input
input
input
input
input
output
output
output
output
output
DESCRIPTION
panel port B green channel
panel port B blue channel
I²C-bus interface clock line
I²C-bus interface data line
I²C-bus address select: 0 = 74H, 1 = 76H
overlay port clock
overlay port vertical sync
overlay port horizontal sync
overlay port pixel active
overlay port input pixel A
overlay port input pixel B
memory clock output
memory Row Address Strobe (RAS) signal (active LOW)
memory Column Address Strobe (CAS) signal
(active LOW)
memory Write Enable (WE) signal (active LOW)
memory data mask (active LOW)
1999 May 11
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