SAA6721E Datasheet, PDF (64/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
handbook, full pagewidth
clock input
data input
data output
tsu(i)
th(i)
data
valid
th(o)
data
transition
period
tPD(o)
MHB490
t_su(i): input set-up time; data input must be stable before active clock edge.
t_h(i): input hold time; data input must be stable after active clock edge.
t_PD(o): output propagation delay; output data becomes stable with respect to active clock edge.
t_h(o): output hold time; output data stays stable with respect to active clock edge.
Fig.23 Data timing diagram.
1.5 V
handbook, full pagewidth
MCLKI
MCLKO
1.5 V
tPD
Fig.24 Memory clock timing.
MHB491
1999 May 11
64