SAA6721E Datasheet, PDF (60/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
8.13.3 TIMING REFERENCE SIGNALS
The SAA6721E supports three timing reference signals to
drive the panels: PVS (vertical synchronization pulse),
PHS (horizontal synchronization pulse) and PDE (data
qualifier). The polarity of these signals is programmable.
To program high polarity the three programming registers
(vsync_pol, hsync_pol, de_pol) must be set to logic 1.
Sometimes panels require that no data qualifier signals
must be active during vertical synchronization.
The generation of PDE pulses during active PVS can be
switched off by de-asserting sync_de_inact.
The position and length of the horizontal synchronization
pulses in an output line must be programmed with
h_hs_start and h_hs_end. The vertical synchronization
pulse starts at line 0 and ends at v_vs_end. The horizontal
start offset in line 0 can be set-up with h_vs_start and the
horizontal end offset with h_vs_end.
The data qualifier PDE frames the display region that
should be visible on the panel horizontally. It will be
asserted at h_de_start and it will be de-asserted at
h_de_end. It frames both horizontal border and active
video region.
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); all ground pins are connected together and all
supply pins are connected together.
SYMBOL
V_DDD
V_DD(PLL)
V_n
∆V_SS
T_stg
T_amb
T_amb(bias)
V_es
PARAMETER
CONDITIONS
MIN.
digital supply voltage
−0.5
PLL supply voltage
−0.5
voltage at digital inputs and outputs
outputs in 3-state −0.5
voltage at digital output
outputs active
voltage difference between V_SS(PLL) and V_SS(D)
storage temperature
−0.5
−
−65
ambient temperature
0
operating bias ambient temperature
−10
electrostatic handling voltage for all pins
note 1
−2
MAX.
UNIT
+4.6
V
+4.6
V
+5.5
V
V_DDD + 0.5 V
100
mV
+150
°C
70
°C
+70
°C
+2
kV
Note
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor.
1999 May 11
60