SAA6721E Datasheet, PDF (59/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
8.13.2 FRAME GENERATION
The output frame contains three main regions:
• Blanking region
• Border region
• Active video region.
The blanking region contains all front and back porch as
well as the synchronization intervals. The border region is
visible on the panel and is used for positioning the active
video region inside this visible area. To ensure a great
flexibility in the ‘sync to input’ mode there are 3 different
horizontal length counters (h_len_blank, h_len_border,
h_len_active) with independent length control
(see Fig.22).
A maximum value must be programmed in h_max_len
which is the upper limit for line lengthening during
activated control mechanism. In free running mode all
3 counters should be programmed with the same
minimum values.
If no border is needed, because the active video region
covers the visible area of the panel, the active video length
counters should point to the same positions as the border
length counters. Then the active video length counters
have a higher priority.
The border colour inserted by the output interface is the
same as the blank colour in the memory interface;
blank_colour_red, blank_colour_green,
blank_colour_blue.
handbook, full pagewidth h_hs_start
starting point
h_hs_end
v_vs_end
v_start
v_active
PHS
h_len_border
h_len_blank
PVS
v_end
h_de_start h_active_start
active video
border
blanking
h_de_end
h_len_active
h_max_len
MHB262
Fig.22 Output frame and timing.
1999 May 11
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