SAA6721E Datasheet, PDF (24/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
ADDRESS R/W D7
D6
D5
D4
80
W
81
W
82
W
83
W
84
W
85
W
86
W
87
W⁽¹⁾
up_h_corr[6 to 0]
down_v_incr[5 to 0]
down_v_corr[6 to 0]
down_h_incr[5 to 0]
down_h_corr[6 to 0]
coeff_index[5 to 0]
coeff_value[6 to 0]
Panning unit
88
W pic_v_offset[7 to 0]
89
W
90
W pic_h_offset[7 to 0]
91
W
92
W out_v_size[7 to 0]
93
W
94
W out_h_size[7 to 1]
95
W
96
W border_colour_red[7 to 0]
97
W border_colour_green[7 to 0]
98
W border_colour_blue[7 to 0]
OSD overlay port
99
W ovl_clk_ ovl_act_ ovl_vs_ ovl_hs_
pol
pol
pol
pol
100
W ovl_hs_start[7 to 0]
101
W
102
W ovl_hs_length[7 to 0]
103
W
104
W ovl_hs_latency[7 to 0]
105
W ovl_h_length[7 to 0]
106
W
107
W ovl_v_offset[7 to 0]
108
W
109
W ovl_v_length[7 to 0]
110
W
111
W ovl_vs_start[7 to 0]
112
W
113
W ovl_colour0_red[7 to 0]
114
W ovl_colour0_green[7 to 0]
115
W ovl_colour0_blue[7 to 0]
D3
D2
D1
D0
up_h_incr[11 to 8]
pic_v_offset[10 to 8]
pic_h_offset[11 to 8]
out_v_size[10 to 8]
0
out_h_size[11 to 8]
clk_
sample_
gating_on edge
ovl_
syncs_
active
ovl_
insert_
active
ovl_hs_start[10 to 8]
ovl_hs_length[10 to 8]
ovl_h_length[10 to 8]
ovl_v_offset[10 to 8]
ovl_v_length[10 to 8]
ovl_vs_start[10 to 8]
1999 May 11
24