SAA6721E Datasheet, PDF (5/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
VCLK
VVS
VHS
CLAMP
GAINC
VPA7 to VPA0
VPB7 to VPB0
VPC7 to VPC0
VPD7 to VPD0
VPE7 to VPE0
VPF7 to VPF0
MCLKI
CLK
OVA2 to OVA0 OVVS
SDA
INT
TDO
TMS TCLK
OVB2
to
SCL
SAD
RST
TDI
TRST OVACT OVB0
OVHS
OVCLK
MODE/SYNC
DETECTION
input frame size and
sync information
I²C-BUS
INTERFACE
AUTO
ADJUSTMENT
CONTROLLER
frequency,
phase and
colour
information
GLOBAL CONTROL
UNIT
RGB
raw data
LINE MEMORY
JTAG
CONTROLLER
RGB/YUV
INPUT
INTERFACE
YUV
RGB
RGB/YUV
data
DOWN
SCALER
memory
÷2
clock
PLL
DIVIDER
panel
clock
UP
SCALER
COLOUR
CORRECTION
PANNING
UNIT
SAA6721E
ON
SCREEN
DISPLAY
TEMPORAL
DITHERING
MEMORY INTERFACE
DE-INTERLACER
OSD
OVERLAY
PORT
OUTPUT
INTERFACE
PAR7 to PAR0
PAG7 to PAG0
PAB7 to PAB0
PBR7 to PBR0
PBG7 to PBG0
PBB7 to PBB0
PVS
PHS
PDE
PCLK
DQ63 DQM BA
to
DQ0
A10 RAS CAS WE MCLKO
to
A0
MHB241
VSSD VDDD
VDD(PLL)
VSS(PLL)
Fig.1 Block diagram.