SAA6721E Datasheet, PDF (36/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
NAME
Scaler
SCALER CONFIGURATION
Horizontal downscaler activation
Horizontal downscaler disabled
Horizontal downscaler enabled
Vertical downscaler activation
Vertical downscaler disabled
Vertical downscaler enabled
Horizontal upscaler activation
Horizontal upscaler disabled
Horizontal upscaler enabled
Vertical upscaler activation
Vertical upscaler disabled
Vertical upscaler enabled
Horizontal upscaling transition function programming
Horizontal upscaling transition function writing disabled
Horizontal upscaling transition function writing enabled
Vertical upscaling transition function programming
Vertical upscaling transition function writing disabled
Vertical upscaling transition function writing enabled
Line memory usage
Line memory used by upscaling unit
Line memory used by downscaling unit
VERTICAL UPSCALE INCREMENT
Increment for vertical upscaling
VERTICAL UPSCALE CORRECTION
Fraction of vertical upscaling increment (¹â„₁₀₀)
HORIZONTAL UPSCALE INCREMENT
Increment for horizontal upscaling
HORIZONTAL UPSCALE CORRECTION
Fraction of horizontal upscaling increment (¹â„₁₀₀)
VERTICAL DOWNSCALE INCREMENT
Increment for vertical downscaling
VERTICAL DOWNSCALE CORRECTION
Fraction of vertical downscaling increment (¹â„₁₀₀)
HORIZONTAL DOWNSCALE INCREMENT
Increment for horizontal downscaling
Preliminary specification
SAA6721E
SUBADDRESS R/W
DATA
75
76 and 77
78
79 and 80
81
82
83
84
W D0
logic 0
logic 1
D1
logic 0
logic 1
D2
logic 0
logic 1
D3
logic 0
logic 1
D4
logic 0
logic 1
D5
logic 0
logic 1
D6
logic 0
logic 1
W D11 to D0
W D6 to D0
W D11 to D0
W D6 to D0
W D5 to D0
W D6 to D0
W D5 to D0
1999 May 11
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