SAA6721E Datasheet, PDF (34/72 Pages) NXP Semiconductors – SXGA RGB to TFT graphics engine

Philips Semiconductors
SXGA RGB to TFT graphics engine
Preliminary specification
SAA6721E
NAME
Colour correction
PROGRAMMING SELECTOR, ACTIVATION
Colour correction activation
Straight colour processing
Colour substitution enabled
Blue component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
Green component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
Red component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
COLOUR INDEX FOR LOOK-UP TABLE WRITING
Colour component look-up table index
COLOUR VALUE FOR LOOK-UP TABLE WRITING
Colour component substitution value
Memory interface/de-interlacing unit
GENERAL CONFIGURATION
De-interlacing mode
No de-interlacing
De-interlacing without filtering
De-interlacing with spatial filtering
De-interlacing with temporal filtering
External memory data bus width
32 bits (two 16-bit channels)
48 bits (three 16-bit channels)
64 bits (four 16-bit channels)
do not use
Internal data path width
RGB and YUV 4 : 4 : 4 processing
YUV 4 : 2 : 2, YUV 4 : 1 : 1 and CCIR 656 processing
ACCESS BURST LENGTH
Number of bursts per read/write access to SDRAM
SDRAM BURST LENGTH
SDRAM burst length
SDRAM initialization code for burst length
1999 May 11
34
SUBADDRESS R/W
DATA
47
W D0
logic 0
logic 1
D1
logic 0
logic 1
D2
logic 0
logic 1
D3
logic 0
logic 1
48
W D7 to D0
49
W D7 to D0
50
W D1 and D0
D1 = 0 and D0 = 0
D1 = 0 and D0 = 1
D1 = 1 and D0 = 0
D1 = 1 and D0 = 1
D3 and D2
D3 = 0 and D2 = 0
D3 = 0 and D2 = 1
D3 = 1 and D2 = 0
D3 = 1 and D2 = 1
D4
logic 0
logic 1
51
W D3 to D0
52
W D3 to D0
D6 to D4