SE97 Datasheet, PDF (8/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V

NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
temperature (°C)
critical
Upper Boundary Alarm
T_amb
Lower Boundary Alarm
EVENT in Comparator mode
EVENT in Interrupt mode
software interrupt clear
EVENT in ‘Critical Temp only’ mode
T_trip(u) − T_hys
T_trip(l) − T_hys
T_th(crit) − T_hys
T_trip(u) − T_hys
T_trip(l) − T_hys
time
(1)
Refer to Table 3 for figure note information.
Fig 7. EVENT output condition
(2)
(1) (3)
(4) (3)(5) * (6) (4) (2)
002aae324
Table 3.
Figure
note
(1)
(2)
(3)
(4)
(5)
(6)
EVENT output condition
EVENT output boundary
conditions
EVENT output
Comparator Interrupt Critical Temp
mode
mode
only mode
T_amb ≥ T_trip(l)
T_amb < T_trip(l) − T_hys
T_amb > T_trip(u)
T_amb ≤ T_trip(u) − T_hys
T_amb ≥ T_th(crit)
T_amb < T_th(crit) − T_hys
H
L
H
L
L
H
L
L
H
H
L
H
L
L
L
L
H
H
Temperature Register Status bits
Bit 15
Above
Critical
Trip
Bit 14
Above
Alarm
Window
Bit 13
Below
Alarm
Window
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
0
1
0
When T_amb ≥ T_th(crit) and T_amb < T_th(crit) − T_hys the EVENT output is in Comparator mode
and bit 0 of CONFIG (EVENT output mode) is ignored.
SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
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