SE97 Datasheet, PDF (21/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V

NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
slave address (memory)
word address
SDA S 1 0 1 0 A2 A1 A0 0 A
A
START condition
R/W acknowledge
from slave
acknowledge
from slave
slave address (memory)
data from memory
S 1 0 1 0 A2 A1 A0 1 A
AP
START condition
Fig 19. Selective read timing
R/W acknowledge
from slave
no acknowledge
from master
STOP condition
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7.10.3.3 Sequential read
If the master acknowledges the first data byte transmitted by the SE97, then the device
will continue transmitting as long as each data byte is acknowledged by the master
(Figure 20). If the end of memory is reached during sequential Read, the address counter
will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with
either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting
byte address.
slave address (memory)
data from memory
SDA S 1 0 1 0 A2 A1 A0 1 A
DATA n
A
START condition
R/W acknowledge
from slave
acknowledge
from master
Fig 20. Sequential read timing
data from memory
DATA n + 1
A
acknowledge
from master
data from memory
DATA n + X
AP
no acknowledge
from master
STOP condition
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SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
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