SE97 Datasheet, PDF (18/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V

NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
Table 5 is the summary for normal and memory protection instructions.
Table 5. EEPROM commands summary
Command
Fixed address
Normal EEPROM read/write
Reversible Write Protection (RWP)
Clear Reversible Write Protection (CRWP)
Permanent Write Protection (PWP)^[2]
Read RWP
Read CRWP
Read PWP
Bit 7^[1]
1
0
0
0
0
0
0
Bit 6
0
1
1
1
1
1
1
Bit 5
1
1
1
1
1
1
1
Bit 4
0
0
0
0
0
0
0
Hardware selectable
address
Bit 3 Bit 2 Bit 1
A2
A1
A0
V_SS
V_SS
A2
V_SS
V_DD
A1
V_I(ov)[3]
V_I(ov)[3]
A0
V_SS
V_SS
A2
V_SS
V_DD
A1
V_I(ov)[3]
V_I(ov)[3]
A0
R/W
Bit 0
R/W
0
0
0
1
1
1
[1] The most significant bit, bit 7, is sent first.
[2] A0, A1, and A2 are compared against the respective external pins on the SE97.
[3] V_I(ov) ranges from 7.8 V to 10 V.
This special EEPROM command consists of a unique 4-bit fixed address (0110b) and the
voltage level applied on the 3-bit hardware address. Normally, to address the memory
array, the 4-bit fixed address is ‘1010b’. To access the memory protection settings, the
4-bit fixed address is ‘0110b’. Figure 16 and Figure 17 show the write and read protection
sequence, respectively.
Up to eight memory devices can be connected on a single I²C-bus. Each one is given a
3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds
when the 4-bit fixed and hardware selectable bits are matched. The 8th bit is the
read/write bit. This bit is set to 1 or 0 for read and write protection, respectively.
The corresponding device acknowledges during the ninth bit time when there is a match
on the 7-bit address.
The device does not acknowledge when there is no match on the 7-bit address or when
the device is already in permanent write protection mode and is programmed with any
write protection instructions (i.e., PWP, RWP, CWP).
slave address (memory)
dummy byte address
dummy data
SDA S 0 1 1 0 A2 A1 A0 0 A X X X X X X X X A X X X X X X X X A P
START condition
R/W acknowledge⁽¹⁾
from slave
acknowledge⁽¹⁾
from slave
X = Don’t Care
(1) Refer to Table 6 regarding the exact state of the acknowledge bit.
Fig 16. Software Write Protect (write)
acknowledge⁽¹⁾
from slave
STOP condition
002aab356
SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
18 of 54