SE97 Datasheet, PDF (13/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V

NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
START bit
read
Alert Response Address
acknowledge
no acknowledge STOP bit
device address
S 0 0 0 1 1 0 0 1 0 0 0 1 1 A2 A1 A0 0 1 P
host detects
SMBus ALERT
master sends a START bit,
ARA and a read command
Slave acknowledges and
sends its slave address.
The last bit of slave address
is hard coded '0'.
host NACK and
sends a STOP bit
002aac685
Fig 8. How SE97 responds to SMBus Alert Response Address
7.9 SMBus/I²C-bus interface
The data registers in this device are selected by the Pointer register. At power-up, the
Pointer register is set to ‘00h’, the location for the Capability register. The Pointer register
latches the last location to which it was set. Each data register falls into one of three types
of user accessibility:
• Read only
• Write only
• Write/Read same address
A ‘write’ to this device will always include the address byte and the pointer byte. A write to
any register other than the Pointer register requires two data bytes.
Reading this device can take place either of two ways:
• If the location latched in the Pointer register is correct (most of the time it is expected
that the Pointer register will point to one of the Temperature register (as it will be the
data most frequently read), then the read can simply consist of an address byte,
followed by retrieving the two data bytes.
• If the Pointer register needs to be set, then an address byte, pointer byte,
repeat START, and another address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, this device can accept
either Acknowledge (ACK) or No Acknowledge (NACK) from the Master (No Acknowledge
is typically used as a signal for the slave that the Master has read its last byte). It takes this
device 125 ms to measure the temperature. Refer to timing diagrams Figure 9 to
Figure 12 for how to program the device.
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
SDA
A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
S
WA
A
P
START
device address and write
ACK
by device
register address
ACK STOP
by device
002aab308
A = ACK = Acknowledge bit. W = Write bit = 0. R = Read bit = 1.
Fig 9. SMBus/I²C-bus write to the Pointer register
SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
13 of 54