SE97 Datasheet, PDF (31/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V

NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
8.6 Temperature register (16-bit read-only)
Table 21. Temperature register bit allocation
Bit
15
14
13
12
11
Symbol ACT
AAW
BAW SIGN
Default
0
0
0
0
0
Access
R
R
R
R
R
Bit
7
6
5
4
3
Symbol
TEMP
Default
0
0
0
0
0
Access
R
R
R
R
R
10
9
TEMP
0
0
R
R
2
1
0
0
R
R
Table 22. Temperature register bit description
Bit Symbol Description
15 ACT
Above Critical Trip.
14 AAW
Increasing T_amb:
0 — T_amb < T_th(crit)
1 — T_amb ≥ T_th(crit)
Decreasing T_amb:
0 — T_amb < T_th(crit) − T_hys
1 — T_amb ≥ T_th(crit) − T_hys
Above Alarm Window.
13 BAW
Increasing T_amb:
0 — T_amb ≤ T_trip(u)
1 — T_amb > T_trip(u)
Decreasing T_amb:
0 — T_amb ≤ T_trip(u) − T_hys
1 — T_amb > T_trip(u) − T_hys
Below Alarm Window.
12 SIGN
Increasing T_amb:
0 — T_amb ≥ T_trip(l)
1 — T_amb < T_trip(l)
Decreasing T_amb:
0 — T_amb ≥ T_trip(l) − T_hys
1 — T_amb < T_trip(l) − T_hys
Sign bit.
0 — positive temperature value
1 — negative temperature value
11:1 TEMP Temperature Value (2’s complement). (LSB = 0.125 °C)
0
RFU
reserved; always ‘0’
8
0
R
0
RFU
0
R
SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
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