English
Language : 

SE97 Datasheet, PDF (5/54 Pages) NXP Semiconductors – DDR memory module temp sensor with integrated SPD, 3.3 V
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
6. Pinning information
6.1 Pinning
A0 1
A1 2
A2 3
VSS 4
SE97PW
8 VDD
7 EVENT
6 SCL
5 SDA
002aab805
Fig 2. Pin configuration for TSSOP8
terminal 1
index area
A0 1
A1 2
A2 3
VSS 4
SE97TK
8 VDD
7 EVENT
6 SCL
5 SDA
002aab803
Transparent top view
Fig 4. Pin configuration for HVSON8
terminal 1
index area
A0 1
A1 2
A2 3
SE97TL
8 VDD
7 EVENT
6 SCL
VSS 4
5 SDA
002aad548
Transparent top view
Fig 3. Pin configuration for HXSON8
terminal 1
index area
A0 1
A1 2
A2 3
VSS 4
SE97TP
8 VDD
7 EVENT
6 SCL
5 SDA
002aad768
Transparent top view
Fig 5. Pin configuration for HWSON8
6.2 Pin description
Table 2.
Symbol
A0
Pin description
Pin Type
1
I
A1
A2
VSS
SDA
2
I
3
I
4
ground
5
I/O
SCL
6
I
EVENT 7
O
VDD
8
power
Description
I2C-bus/SMBus slave address bit 0 with internal pull-down. This
input is overvoltage tolerant to support software write protection.
I2C-bus/SMBus slave address bit 1 with internal pull-down
I2C-bus/SMBus slave address bit 2 with internal pull-down
device ground
SMBus/I2C-bus serial data input/output (open-drain). Must have
external pull-up resistor.
SMBus/I2C-bus serial clock input/output (open-drain). Must have
external pull-up resistor.
Thermal alarm output for high/low and critical temperature limit
(open-drain). Must have external pull-up resistor.
device power supply (3.0 V to 3.6 V); supports 1.7 V for
EEPROM read only.
SE97_5
Product data sheet
Rev. 05 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
5 of 54