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MC68HC705P9 Datasheet, PDF (97/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit | |||
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Timer
Timing
INTERNAL
BUS CLOCK


T00




T01
TIMER 
CLOCKS

 T10




T11
16-BIT $FFEB
COUNTER
OUTPUT COMPARE
REGISTERS
$FFEC
CPU WRITES $FFED
$FFED
$FFEE
$FFED
$FFEF
COMPARE
REGISTER LATCH
OUTPUT COMPARE
FLAG AND TCMP
NOTES:
1. A write to the output compare registers may occur at any time, but a compare only occurs at
timer state T01. Therefore, the compare may follow the write by up to four cycles.
2. The output compare ï¬ag is set at the timer state T11 that follows the comparison latch.
Figure 8. Output Compare Timing
INTERNAL
BUS CLOCK


T00


TIMER


T01

CLOCKS 
 T10




T11
16-BIT
COUNTER
OVERFLOW
FLAG (TOF)
$FFFF
$0000
$0001
Figure 9. Timer Overflow Timing
$0002
9-tim1ic1oc_a
MOTOROLA
Timer
97
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