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| MC68HC705P9 Datasheet, PDF (115/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit | |||
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Interrupts
SIOP
Interrupts
Table 2. SIOP Timing (VDD = 3.3 Vdc)(1)
Characteristic
Symbol Min Max
Frequency of Operation
Master
Slave
fSIOP (M)
fSIOP(S)
fOSC/64
dc
fOSC/8
250
Cycle Time
Master
Slave
Clock (SCK) Low Time (fOP = 1.0 MHz)(3) (4)
tSCK(M)
tSCK(S)
tSCKL
4.0
â
1980
4.0
4000
â
SDO Data Valid Time
tV
â
400
SDO Hold Time
tHO
0
â
SDI Setup Time
tS
200
â
SDI Hold Time
tH
200
â
1. VDD = 3.3 Vdc ±10%, VSS = 0 Vdc, TA = TL to TH unless otherwise noted
2. tCYC = 1 ÷ fOP
3. fOSC = crystal frequency; fOP = fOSC ÷ 2 = 1.0 MHz maximum
4. In master mode, the frequency of SCK is fOP ÷ 4.
Unit
MHz
kHz
tCYC(2)
ns
ns
ns
ns
ns
The SIOP does not generate interrupt requests.
9-siop_a
MOTOROLA
SIOP
115
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