MC68HC705P9 Datasheet, PDF (31/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory
Mask Option Register
Mask Option Register
The mask option register (MOR) is an EPROM/OTPROM byte that is
programmable only with the bootloader function. The MOR controls the
following options:
• LSB first or MSB first SIOP data transfer
• Edge-triggered or edge- and level-triggered external interrupt pin
• Enabled or disabled COP watchdog
To program the MOR, use the 5-step procedure given in the section
EPROM Programming Register on page 26. Write to address $0900 in
step 3.
$0900
Read:
Write:
Reset:
Erased:
Bit 7
6
5
4
3
2
0
0
0
0
0
SIOP
Unaffected by reset
0
0
0
0
0
0
= Unimplemented
Figure 5. Mask Option Register (MOR)
1
Bit 0
IRQ
COPE
0
0
SIOP — Serial I/O Port
The SIOP bit controls the shift direction into and out of the SIOP shift
register.
1 = SIOP data transferred LSB first (bit 0 first)
0 = SIOP data transferred MSB first (bit 7 first)
IRQ — Interrupt Request
The IRQ bit makes the external interrupt function of the IRQ/V_PP pin
level-triggered as well as edge-triggered.
1 = IRQ/V_PP pin negative-edge triggered and low-level triggered
0 = IRQ/V_PP pin negative-edge triggered only
13-mc68hc705p9
MOTOROLA
Memory
31