MC68HC705P9 Datasheet, PDF (59/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Interrupts
Software
Interrupt
External
Interrupt
Resets and Interrupts
Interrupts
The following sources can generate interrupts:
• SWI instruction
• IRQ/V_PP pin
• Capture/compare timer
An interrupt temporarily stops normal program execution to process a
particular event. An interrupt does not stop the operation of the
instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
CPU registers on the stack and loads the program counter with a
user-defined interrupt vector address.
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
An interrupt signal on the IRQ/V_PP pin latches an external interrupt
request. When the CPU completes its current instruction, it tests the IRQ
latch. If the IRQ latch is set, the CPU then tests the I bit in the condition
code register. If the I bit is clear, the CPU then begins the interrupt
sequence.
The CPU clears the IRQ latch during interrupt processing, so that
another interrupt signal on the IRQ/V_PP pin can latch another interrupt
request during the interrupt service routine. As soon as the I bit is
cleared during the return from interrupt, the CPU can recognize the new
interrupt request. Figure 4 shows the IRQ/V_PP pin interrupt logic.
5-mc68hc705p9
MOTOROLA
Resets and Interrupts
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