MC68HC705P9 Datasheet, PDF (126/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

ADC _{I/O Registers}
I/O Registers
The following registers control and monitor operation of the ADC:
• ADC status and control register (ADSCR)
• ADC data register (ADDR)
ADC Status and
Control Register
The ADC status and control register (ADSCR) contains a conversion
complete flag and four writable control bits. Writing to ADSCR clears the
conversion complete flag and starts a new conversion sequence.
$001E Bit 7
6
5
4
3
2
1
Bit 0
Read: CCF
0
ADRC ADON
Write:
0
CH2
CH1
CH0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 2. ADC Status and Control Register (ADSCR)
CCF — Conversion Complete Flag
This read-only bit is automatically set when an analog-to-digital
conversion is complete, and a new result can be read from the ADC
data register. Clear the CCF bit by writing to the ADC status and
control register or by reading the ADC data register. Resets clear the
CCF bit.
1 = Conversion complete
0 = Conversion not complete
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126
ADC
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