MC68HC705P9 Datasheet, PDF (24/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory _RAM
Addr.
$0900
$1FF0
RAM
Name
R/W Bit 7 6
5
4
3
2
1 Bit 0
Read: 0
0
0
0
0 SIOP IRQ COPE
Mask Option Register (MOR)
Write:
Reset:
Unaffected by reset
0
Read:
COP Register (COPR)
R
R
R
R
R
R
R COPC
Write:
Reset:
Unaffected by reset
= Unimplemented
R = Reserved
Figure 2. I/O Register Summary (Continued)
U = Unaffected
The 128 addresses from $0080–$00FF are RAM locations. The CPU
uses the top 64 RAM addresses, $00C0–$00FF, as the stack. Before
processing an interrupt, the CPU uses five bytes of the stack to save the
contents of the CPU registers. During a subroutine call, the CPU uses
two bytes of the stack to store the return address. The stack pointer
decrements when the CPU stores a byte on the stack and increments
when the CPU retrieves a byte from the stack.
NOTE:
Be careful when using nested subroutines or multiple interrupt levels.
The CPU may overwrite data in the RAM during a subroutine or during
the interrupt stacking operation.
6-mc68hc705p9
24
Memory
MOTOROLA