MC68HC705P9 Datasheet, PDF (109/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

SIOP
Introduction
INTERNAL BUS
SIOP DATA REGISTER
76543210
FROM MOR SIOP
SIOP
CONTROL
PIN
CONTROL
LOGIC
AND
DDR
PB5/SDO
PB7/SCK
PB6/SDI
INTERNAL
CLOCK
(f_OSC ÷ 2)
DIVIDE
BY 4
SPE
MSTR
SPIF
DCOL
CLOCK
LOGIC
MS
Figure 1. SIOP Block Diagram
Addr.
Name
Bit 7 6
5
4
3
2
$000A
SIOP Control Register (SCR)
Read:
Write:
0
SPE
0 MSTR 0
0
Reset: 0
0
0
0
0
0
$000B
SIOP Status Register (SSR)
Read:
Write:
SPIF
DCOL
0
0
0
0
Reset: 0
0
0
0
0
0
$000C
SIOP Data Register (SDR)
Read:
Write:
Bit 7
6
Reset:
5
4
3
2
Unaffected by reset
= Unimplemented
Figure 2. SIOP I/O Register Summary
1 Bit 0
0
0
0
0
0
0
0
0
1 Bit 0
3-siop_a
MOTOROLA
SIOP
109