MC68HC705P9 Datasheet, PDF (23/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory
Input/Output Register Summary
Addr.
Name
R/W Bit 7 6
Read:
Bit 7
6
$0017 Output Compare Register Low (OCRL) Write:
Reset:
5
4
3
2
5
4
3
2
Unaffected by reset
1 Bit 0
1
Bit 0
$0018
Read: Bit 15 14
Timer Register High (TRH)
Write:
Reset:
13
12
11
10
Reset initializes TRH to $FF
9
Bit 8
$0019
Read: Bit 7 6
Timer Register Low (TRL)
Write:
Reset:
5
4
3
2
Reset initializes TRL to $FC
1
Bit 0
Read: Bit 15 14
$001A Alternate Timer Register High (ATRH)
Write:
Reset:
13
12
11
10
Reset initializes ATRH to $FF
9
Bit 8
Read: Bit 7 6
$001B Alternate Timer Register Low (ATRL)
Write:
Reset:
5
4
3
2
Reset initializes ATRL to $FC
1
Bit 0
Read: 0
0
0
0
0
0
$001C EPROM Programming Register (EPROG)
LATCH
EPGM
Write: R
R
R
R
R
R
Reset:
Unaffected by reset
$001D
Read: Bit 7 6
ADC Data Register (ADDR)
Write:
Reset:
5
4
3
2
Unaffected by reset
1
Bit 0
Read: CCF
0
$001E ADC Status/Control Register (ADSCR)
ADRC ADON
Write:
Reset: 0
0
0
0
0
CH2 CH1 CH0
0
0
0
0
$001F
Read:
Reserved
R
R
R
R
R
R
R
R
Write:
Reset:
= Unimplemented
R = Reserved
Figure 2. I/O Register Summary (Continued)
U = Unaffected
5-mc68hc705p9
MOTOROLA
Memory
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