PIC16LF1526 Datasheet, PDF (86/354 Pages) Microchip Technology – 64-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1526/27
7.6.7 PIR2 REGISTER
The PIR2 register contains the interrupt flag bits, as
shown in Register 7-7.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 7-7: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
R/W-0/0
R/W-0/0
R/W-0/0
U-0
OSFIF
TMR5GIF TMR3GIF
—
bit 7
R/W-0/0
BCL1IF
R/W-0/0
TMR10IF
R/W-0/0
TMR8IF
R/W-0/0
CCP2IF
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
OSFIF: Oscillator Fail Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 6
TMR5GIF: Timer5 Gate Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 5
TMR3GIF: Timer3 Gate Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 4
Unimplemented: Read as ‘0’
bit 3
BCL1IF: MSSP1 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 2
TMR10IF: Timer10 to PR10 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 1
TMR8IF: Timer8 to PR8 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 0
CCP2IF: CCP2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
DS41458A-page 86
Preliminary
 2011 Microchip Technology Inc.