PIC16LF1526 Datasheet, PDF (197/354 Pages) Microchip Technology – 64-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1526/27
20.4 CCP Control Registers
REGISTER 20-1: CCPxCON: CCPx CONTROL REGISTER
U-0
—
bit 7
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
DCxB<1:0>
R/W-0/0
R/W-0/0
CCPxM<3:0>
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
bit 7-6
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match
0011 = Reserved
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every 4th rising edge
0111 = Capture mode: every 16th rising edge
1000 = Compare mode: set output on compare match (set CCPxIF)
1001 = Compare mode: clear output on compare match (set CCPxIF)
1010 = Compare mode: generate software interrupt only
1011 = Compare mode: Special Event Trigger (sets CCP10IF bit (CCP10), starts A/D conversion if A/D module
is enabled)⁽¹⁾
11xx = PWM mode
 2011 Microchip Technology Inc.
Preliminary
DS41458A-page 197