PIC17C7XX Datasheet, PDF (75/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
TABLE 10-3: PORTB FUNCTIONS
Name
Bit Buffer Type
Function
RB0/CAP1
bit0
ST
RB1/CAP2
bit1
ST
RB2/PWM1
bit2
ST
RB3/PWM2
bit3
ST
RB4/TCLK12 bit4
ST
RB5/TCLK3
bit5
ST
RB6/SCK
bit6
ST
RB7/SDO
bit7
ST
Legend: ST = Schmitt Trigger input.
Input/Output or the Capture1 input pin. Software programmable weak
pull-up and interrupt on change features.
Input/Output or the Capture2 input pin. Software programmable weak
pull-up and interrupt on change features.
Input/Output or the PWM1 output pin. Software programmable weak pull-up
and interrupt on change features.
Input/Output or the PWM2 output pin. Software programmable weak pull-up
and interrupt on change features.
Input/Output or the external clock input to Timer1 and Timer2. Software pro-
grammable weak pull-up and interrupt on change features.
Input/Output or the external clock input to Timer3. Software programmable
weak pull-up and interrupt on change features.
Input/Output or the master/slave clock for the SPI. Software programmable
weak pull-up and interrupt on change features.
Input/Output or data output for the SPI. Software programmable weak
pull-up and interrupt on change features.
TABLE 10-4: REGISTERS/BITS ASSOCIATED WITH PORTB
Address
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
MCLR,
WDT
12h, Bank 0
11h, Bank 0
PORTB
DDRB
RB7/
SDO
RB6/
SCK
RB5/
TCLK3
RB4/
TCLK12
Data direction register for PORTB
RB3/
PWM2
RB2/
PWM1
RB1/
CAP2
RB0/
CAP1
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
10h, Bank 0 PORTA RBPU
—
RA5/
TX1/CK1
RA4/
RX1/DT1
RA3/
SDI/SDA
RA2/
SS/SCL
RA1/T0CKI RA0/INT ^{0-xx 11xx 0-uu 11uu}
06h, Unbanked CPUSTA
07h, Unbanked INTSTA
16h, Bank 1 PIR1
17h, Bank 1 PIE1
16h, Bank 3 TCON1
—
—
PEIF T0CKIF
RBIF TMR3IF
RBIE TMR3IE
CA2ED1 CA2ED0
STKAV
T0IF
TMR2IF
TMR2IE
CA1ED1
GLINTD
INTF
TMR1IF
TMR1IE
CA1ED0
TO
PEIE
CA2IF
CA2IE
T16
PD
T0CKIE
CA1IF
CA1IE
TMR3CS
POR
T0IE
TX1IF
TX1IE
TMR2CS
BOR --11 11qq --11 qquu
INTE 0000 0000 0000 0000
RC1IF x000 0010 u000 0010
RC1IE 0000 0000 0000 0000
TMR1CS 0000 0000 0000 0000
17h, Bank 3 TCON2 CA2OVF CA1OVF PWM2ON PWM1ON CA1/PR3 TMR3ON TMR2ON
Legend: x = unknown, u = unchanged, - = unimplemented read as '0', q = Value depends on condition.
Shaded cells are not used by PORTB.
TMR1ON 0000 0000 0000 0000
© 1998 Microchip Technology Inc.
DS30289A-page 75