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PIC17C7XX Datasheet, PDF (172/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D | |||
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PIC17C7XX
15.2.18.3 BUS COLLISION DURING A STOP
CONDITION
Bus collision occurs during a STOP condition if:
a) After the SDA pin has been de-asserted and
allowed to ï¬oat high, SDA is sampled low after
the BRG has timed out.
b) After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allow to
ï¬oat. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0'. If the SCL pin is sampled low before
SDA is allowed to ï¬oat high, a bus collision occurs.
This is another case of another master attempting to
drive a data '0'. (Figure 15-43)
FIGURE 15-43: BUS COLLISION DURING A STOP CONDITION (CASE 1)
TBRG
TBRG
TBRG
SDA
SDA sampled
low after TBRG,
Set BCLIF
SCL
SDA asserted low
PEN
BCLIF
P '0'
'0'
SSPIF '0'
'0'
FIGURE 15-44: BUS COLLISION DURING A STOP CONDITION (CASE 2)
TBRG
TBRG
TBRG
SDA
SCL
Assert SDA
SCL goes low before SDA goes high
Set BCLIF
PEN
BCLIF
P
'0'
'0'
SSPIF '0'
'0'
DS30289A-page 172
© 1998 Microchip Technology Inc.
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