PIC17C7XX Datasheet, PDF (226/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
TABLRD
Table Read
Example1:
TABLRD 1, 1, REG ;
Before Instruction
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
= 0x53
= 0xAA
= 0x55
= 0xA356
= 0x1234
After Instruction (table write completion)
REG
= 0xAA
TBLATH
= 0x12
TBLATL
= 0x34
TBLPTR
= 0xA357
MEMORY(TBLPTR) = 0x5678
Example2:
TABLRD 0, 0, REG ;
Before Instruction
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
= 0x53
= 0xAA
= 0x55
= 0xA356
= 0x1234
After Instruction (table write completion)
REG
= 0x55
TBLATH
= 0x12
TBLATL
= 0x34
TBLPTR
= 0xA356
MEMORY(TBLPTR) = 0x1234
DS30289A-page 226
TABLWT
Table Write
Syntax:
[ label ] TABLWT t,i,f
Operands:
0 ≤ f ≤ 255
i ∈ [0,1]
t ∈ [0,1]
Operation:
If t = 0,
f → TBLATL;
If t = 1,
f → TBLATH;
TBLAT → Prog Mem (TBLPTR);
If i = 1,
TBLPTR + 1 → TBLPTR
If i = 0,
TBLPTR is unchanged
Status Affected: None
Encoding:
1010 11ti ffff ffff
Description:
1. Load value in ’f’ into 16-bit table
latch (TBLAT)
If t = 1: load into high byte;
If t = 0: load into low byte
2. The contents of TBLAT is written
to the program memory location
pointed to by TBLPTR
If TBLPTR points to external
program memory location, then
the instruction takes two-cycle
If TBLPTR points to an internal
EPROM location, then the
instruction is terminated when
an interrupt is received.
Note:
The MCLR/VPP pin must be at the programming
voltage for successful programming of internal
memory.
If MCLR/VPP = VDD
the programming sequence of internal memory
will be interrupted. A short write will occur (2 TCY).
The internal memory location will not be affected.
3. The TBLPTR can be automati-
cally incremented
If i = 1; TBLPTR is not
incremented
If i = 0; TBLPTR is incremented
Words:
1
Cycles:
2 (many if write is to on-chip
EPROM program memory)
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write
register
TBLATH or
TBLATL
No
operation
No
operation
(Table Pointer
on Address
bus)
No
No
operation operation
(Table Latch on
Address bus,
WR goes low)
© 1998 Microchip Technology Inc.